This paper proposes generalized controllable strange attractors through dynamic rotation of fractional-order chaotic systems. Dynamic rotation angle enables the generation of multi-scroll and multi-wing attractors from single and double-scroll ones. The rotating systems are integrated with a generalized dynamic switched synchronization scheme. Dynamic control switches determine whether each system plays the role of master or slave. Based on dynamic scaling factors, the master can be one system or a combination of several ones with new strange attractors. The rotating fractional-order systems

This article proposes a new simple scheme for direct power control of a PWM rectifier without a switch table and voltage sensor. The selection of the switching state of the converter is based on the transition of a Petri net, using the instantaneous active and reactive power tracking errors and the angular position of the network line voltage estimated as variables of Controller input based on Petri nets. Simulation and experimental results demonstrated better performance and verified the validity of the new command with the Petri nets applied to the bridge rectifier connected to the

Multi-core and many-core Systems-on-Chip (SoC) are growing more complex than ever. Consequently, developing system models for such SoCs to guide and validate architectural and implementation decisions is becoming a daunting task. It consumes a huge amount of time and effort just to get the model up and running. Although these system models can be fairly abstracted, they still require the setup of a complicated platform to model a homogeneous or a heterogeneous mix of processing cores, a network-on-chip, cache memories, input-output interfaces as well as several other functional units. The

A major portion of the power consumed in today's systems is due to the clock distribution network. Solutions attempted to reduce clocking power result in low efficiency systems or systems with high complexity control schemes. In this work, a low power clock generator is introduced that can reduce switching power of the clock by almost 75%. This circuit uses the charge recycling concept to achieve such power reduction while utilizing a simple control technique. ©2010 IEEE.

[No abstract available]

A novel 4-D chaotic hyperjerk system with four quadratic nonlinearities is presented in this work. It is interesting that the hyperjerk system has no equilibrium. A chaotic attractor is said to be a hidden attractor when its basin of attraction has no intersection with small neighborhoods of equilibrium points of the system. Thus, our new non-equilibrium hyperjerk system possesses a hidden attractor. Chaos in the system has been observed in phase portraits and verified by positive Lyapunov exponents. Adaptive backstepping controller is designed for the global chaos control of the non

This chapter is intended to design and analyze several sliding mode techniques for the stabilization and synchronization of fractional order complex chaotic and hyperchaotic systems. Considering that chaos is a hot topic nowadays due to the vast number of real physical systems such as mechanical, electrical, and chemical systems in which this phenomenon is found; this book chapter will provide novel sliding mode approaches for the stabilization and synchronization of chaotic and hyperchaotic systems. Fractional order chaotic and hyperchaotic systems have been proved to be difficult to

In this study we quantify and interpret the inherent memory in fractional-order capacitors when subjected to constant current charging/discharging waveforms. This is done via a finite difference approximation of the fractional order rate equation I(t) = Cαdαv(t)/dtα (0 le; α ≤ 1) relating current to voltage in these devices. It is found that as the fractional exponent α decreases, the weight of the voltage memory trace that results from the contribution of past voltage activity increases, and thus the measured response of the device at any time is increasingly correlated to its past. Ideal

In this letter, a third-order wideband voltage-mode all-pass filter (APF) is proposed for application as a true time delay (TTD) cell. The advantages of designing a single-stage higher order filter over cascading several lower order stages are illustrated. The proposed APF circuit is based on a single metal-oxide-semiconductor (MOS) transistor and is canonical because it requires one resistor, one inductor, and two capacitors. To the best of the authors' knowledge, this is the first single-transistor third-order APF circuit to be reported in the literature. The operation of the proposed APF is

A novel scheme suitable for the emulation of fractional-order capacitors and inductors of any order less than 2 is presented in this work. Classically, fractional-order impedances are characterized in the frequency domain by a fractional-order Laplacian of the form s± α with an order 0 < α< 1. The ideal inductor and capacitor correspond, respectively, to setting α= ± 1. In the range 1 < α< 2 , fractional-order impedances can still be obtained before turning into a Frequency- Dependent Negative Resistor (FDNR) at α= ± 2. Here, we propose an electronically tunable fractional-order impedance